Chelsea Search Group is Hiring a Senior IC Layout Design Engineer Near Minneapolis, MN
Senior IC Layout Designer Full-time/Direct-hire Benefits Location: near Minneapolis, Minnesota or remote US Citizen or US Permanent Resident only Job Description: As Layout Design Engineer, you’ll play a crucial role in translating circuit designs into physical layouts. You’ll work closely with analog and mixed-signal design teams, ensuring that our custom-designed chips meet performance, power, and area targets. Additional duties include the evaluation of customer requirements, estimating effort/expenses for projects, development of test/characterization plans and datasheets, participation in debug and root cause analysis efforts, and engaging with the quality team to improve design processes/methodologies. Essential Duties & Qualifications: • Layout Development: - Create and optimize physical layouts for analog and mixed-signal blocks using FinFET technology. - Collaborate with circuit designers to understand design requirements and constraints. - Implement layout floorplans, place, and route components, and perform layout verification. • Analog and Mixed-Signal Expertise: - Design custom layouts for analog building blocks such as LNAs, mixers, amplifiers, VCOs, and PLLs. - Optimize layouts for performance, noise, and parasitics. - Ensure compliance with design rules and DRC/LVS checks. • FinFET Technology: - Work with advanced process nodes (e.g., 16nm, 7nm, or below) using FinFET transistors. - Understand FinFET-specific layout considerations (e.g., fin pitch, gate pitch, and contact/via rules). • Layout Verification: - Perform layout extraction, parasitic extraction, and post-layout simulations. - Collaborate with verification engineers to ensure layout correctness and functionality. • Physical Verification and Closure: - Run DRC (Design Rule Check) and LVS (Layout vs. Schematic) checks. - Address any violations and achieve layout closure. Requirements: • BSEE or equivalent • 5 years of direct industry experience with analog and mixed signal layout • Strong design experience using Cadence PDKs • Proficiency in layout tools (e.g. Cadence Virtuoso, Synopsys IC Compiler) • Knowledge of OS Linux, scripting languages – e.g., Python, Shell, TCL • A self-starter with the ability to assume leadership roles • Ability to work well in a diverse team environment • Experience with industry standard development tools and methodologies