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Fall Co-op- Design Verification Engineer
Cirrus Logic Austin, TX
$87k-105k (estimate)
Full Time | Semiconductor 3 Days Ago
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Cirrus Logic is Hiring a Fall Co-op- Design Verification Engineer Near Austin, TX

For nearly four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for an award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement and delivering enjoyable employee experiences at every turn. But we couldn't do it without our extraordinary workforce - and that's where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career!
Cirrus Logic's Mixed Signal Audio Verification/Validation Engineering team is hiring interns to assist experienced engineers with functional verification of mixed-signal audio CODECs. This is an opportunity to work closely with digital/analog designers, applications engineers and manufacturing test to support both pre-silicon verification and post silicon validation efforts.
Responsibilities
  • Assist with verification planning
  • Support with testbench development
  • Maintenance with failure analysis and resolution
  • Help with coverage analysis and population
  • Work on digital/mixed-signal modeling, directed/constraint-random test generation, and flow development
Required Skills & Qualifications
  • Must be pursuing a MSEE/MSCE
  • Strong background with HDLs (e.g. Verilog, VHDL) and HVLs (e.g.SystemVerilog/UVM, Vera, e)
Preferred Skills & Qualifications
  • Scripting (e.g. Perl, Python, Unix/Linux shell)
  • Knowledge of signal processing concepts, Matlab
  • Object oriented programming (e.g.SystemVerilog)
This opportunity is available for the fall semester only. It is available only to students currently enrolled in a MS or PhD program in Electrical Engineering maintaining a GPA of 3.6 or above, and who will be returning to school for at least one semester following completing of his/her internship. Candidate must be available for full time employment during the internship.
Cirrus Logic follows a 2 day in-office work schedule but interns should expect to be in the office more often, up to 5 days per week, based on business needs and team preference. Interns must be based within commutable distance of the work location listed on the job posting, or willing to relocate prior to beginning their internship with Cirrus Logic.
Diversity drives innovation at Cirrus Logic. Different approaches, ideas and points of view are both valued and respected, and employees are rewarded for their skills, experience and performance. Additionally, Cirrus Logic is an Equal Opportunity/Affirmative Action Employer, and we do not discriminate on the basis of race, color, national origin, pregnancy status, marital status, gender, age, religion, physical or mental disability, medical condition, veteran status, sexual orientation, gender identity, genetic information or any other characteristic protected by law.
Cirrus Logic is an Equal Opportunity/Affirmative Action Employer. We strive to select the best qualified applicant for any opening and to reward employees based on their skills, experience and performance. We do not discriminate on the basis of race, national origin, pregnancy status, marital status, gender, age, religion, physical or mental disability, medical condition, veteran status, sexual orientation, genetic information or any other characteristic protected by law.

Job Summary

JOB TYPE

Full Time

INDUSTRY

Semiconductor

SALARY

$87k-105k (estimate)

POST DATE

06/24/2024

EXPIRATION DATE

08/22/2024

WEBSITE

cirrus.com

HEADQUARTERS

DELAWARE, OH

SIZE

1,000 - 3,000

FOUNDED

1984

TYPE

Public

CEO

STEVEN D PIROSKA

REVENUE

$1B - $3B

INDUSTRY

Semiconductor

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About Cirrus Logic

Cirrus Logic is an American semiconductor company that supplies analog, mixed-signal, and audio DSP integrated circuits.

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