Energy Jobline IN is Hiring a Principal Analog IC Design Engineer Near Santa Clara, CA
Job DescriptionAnalog IC Design Engineer, Principal Santa Clara, CA, US Hybrid - Currently, 2 days a week in the office You will be working with multi-functional teams to deliver high-speed Ethernet products. You will define specifications based on link budget, behavioral modeling, and transistor-level feasibility. You will also drive schematic design and collaborate on mask design for implementation. And finally, with the team, you will drive designs into volume production and delight customers. What We're Looking For Master’s degree and/or PhD in Electrical Engineering and 5 years of experience.
The ideal candidate should have a deep understanding of analog mixed-signal design with experience in high-speed transceivers.
Solid understanding and experience of designing analog mixed-signal circuit blocks including PLL, phase interpolator, low jitter clock distribution, Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, high-speed DACs and ADCs, Filters
In-depth knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques
Experience with Tx/Rx equalization techniques and circuits like de-emphasis, CTLE, DFE
Experience with high-speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.)
Familiarity with CDR architectures and implementations
Design experience in advanced CMOS technologies, design with FinFet technology
Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization
Experience in lab testing of high-speed transceivers