IFS Staff/Sr. Staff Engineer - Standard Cell at Intel in Boise, Idaho, United States Job Description Job Description Do Something Wonderful Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel ( or the links below Life at Intel ( Diversity at Intel As an integral part of Intel's new IDM2.0 strategy, we are establishing Intel Foundry Services IFS, a fully vertical, standalone foundry business, reporting directly to the CEO. IFS will be a world-class foundry business and major provider of US and European-based capacity to serve customers globally. Intel Foundry Services will be differentiated from other Foundry offerings with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe - available for customers globally - and a world-class IP portfolio that customers can choose from including x86 cores, graphics, media, display, AI, interconnect, fabric, and other critical foundational IP, along with Arm and RISC-V ecosystem IPs. IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages. This business unit is dedicated to the success of its customers with full P and L responsibilities. This model will ensure that our foundry customers' products will receive our utmost focus in terms of service, technology enablement and capacity commitments. IFS is already engaged with customers today starting with our existing foundry offerings and we are expanding imminently to include our most advanced technologies, which are optimized for cutting-edge performance, making them ideal for high-performance applications. About the Role: Intel Foundry Services is looking for a Standard (Std) Cell Library engineer with experience in: Standard cell design techniques and architectural tradeoffs Strong understanding of cell architectures, design techniques to optimize for best-in-class cell PPA. Background in digital design including CMOS combinatorial logic and sequential circuit and layout. Familiarity with EDA tools/flows/methodologies for cell characterization, correlation, and validation Working with customer to provide technical applications and solutions support. Technically manage 3rd party IP supplier engagements alongside partner organizations This individual will work with the standard (std) cell library and lead to socialize and drive decisions with IFS stakeholders by synthesizing IP requirements from customers, gather market intelligence and work with internal and 3rd party IP suppliers to enable a rich platform portfolio on leading-edge foundry technologies to enable customer products and address market segment needs with best-in-class PPAC (power, performance, area, cost) IP. The ideal candidate should exhibit the following behavioral traits: Service mindset with a focus on quality solutions, drive velocity of execution and thrive in solving complex problems for foundry customers. Skills with technically managing ecosystem collaborations. In-depth knowledge /experience with Intel technology is a strong plus. Strong communication and presentation skills The ability to be customer focused and obsessed in driving issue resolution and meeting delivery milestones with high quality collaterals. Qualifications You must possess the below minimum qualifications to considered for this position. Preferred qualifications are in addition to the minimum requirements and will be a factor in identifying top candidates. Minimum Qualifications: Master's degree with at least 7 years additional experience, or a PhD with 3 years additional experience, in Electrical Engineering or Physics, or related field with Minimum 7 years' experience in designing std cell libraries on leading edge technologies with silicon validated IPs in high volume products. Understanding technology and design tradeoffs for std cells is a must. Strong understanding of cell architectures, design techniques to optimize for best-in-class cell PPA. Knowledge of Std cell context based extraction flow, cell characterization, Static timing analysis (STA), PrimeTime versus Spice correlation is required. EDA tools/flows/methodologies used for cell characterization, correlation with Spice, EDA view generation (timing, noise, power, etc.) and validation is a must. Familiarity with std cell library quality assurance (QA) and release methodology Preferred Qualifications: Detailed understanding of std cell architecture and specifications to provide technical support to foundry customers. Demonstrate deep technical knowledge of std cell library development and usage/application on multiple technology nodes. Ability to work independently to influence and drive technical decisions with partner organization. Support the IFS ecosystem team alongside with the std cell library lead as a technical expert to facilitate IP development through 3rd party IP suppliers. Strong understanding of physical design, quality and reliability techniques and trade-offs Experienced in working with multiple foundry technologies would be desired. Inside this Business Group Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first 'Open System Foundry' model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient and sustainable source of supply. Other Locations US, TX, Austin; US, AZ, Phoenix; US, CA, Folsom; US, CA, Santa Clara Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (Annual Salary Range for jobs which could be performed in US, California: $139,480.00-$209,760.00 Salary range dependent on a number of factors including location and experience Working Model This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. To view full details and how to apply, please login or create a Job Seeker account