Leapfrog Semiconductor is a well funded chip design startup engaged in developing cutting edge solutions for the AI enhanced communications signal processing market (e.g: 5G, Wifi physical layer, Automotive/radar, etc). We are headquartered at San Diego, California and have a major engineering center at Bangalore, India. Backed by leading venture capitalists, and founded by industry veterans, we are uniquely poised to be a major disruptor in the wireless communication space. We invite you to know more about us at leapfrogsemi.com

Working at Leapfrog: The promise

• Cutting edge product development work
• Intellectually invigorating atmosphere 
• Opportunity to work as a part of a global team of experts in their respective fields
• Meritocratic work culture with emphasis on ownership and accountability
• Avenues for accelerated professional growth
• Competitive compensation
• Generous stock options in an early stage startup with a huge upside potential

Working at Leapfrog: The premise

• You are excited at the prospect of participating in grounds-up product development
• You have a burning desire to get better as an engineer every day
• Challenges bring out the best in you
• Your work and work ethic reflect your commitment to a bias for action
• You believe in giving your best even when no one is looking
• Notwithstanding your experience level, you look for the devil in the technical details

  Responsibilities :- 

  Leapfrog is developing an advanced RISC-V based, state of the art multi-core architecture, with associated memory and NOC subsystems, complex data processing subsystems and high speed interconnects (PCIE,Ethernet,JESD) targeted for 5G physical layer signal processing. 

  The FPGA implementation/validation engineer in the team will have ownership of mapping the design at unit and at full chip level onto FPGA and work with either standalone or interface with other FPGA platforms. 

  The engineer will

  • plan and execute unit and cluster level implementation of RTL, develop the wrapper logic, map the design onto the state of the art FPGA platforms and ensure that the design is meets the quality and performance.
  • Will be responsible for developing testbench in SV/UVM to verify the sanity of the design prior to the FPGA testing.
  • work with architects to understand and influence the unit's architecture, plan and implement design changes in Verilog or SV, plan and implement verification environment in UVM, and execute the verification plan until all quality criteria are met.
   

  FPGA Engineer ( FPGA Design)

  • PhD / Masters / Bachelors Degree in Electronics or Computer Engineering
  • 5 yrs Industry experience 
  • Design/RTL experience in Verilog or SV is a must.
  • Proficient in FPGA tools such as Synplicity, Xilinx Vivado and ChipScope usage ( Experience with one of MPSOC, RFSOC, Ultrascale devices is required)
  • Experience in FPGA timing constraints, timing analysis, clock domain crossing.
  • Experience of timing closure of large designs requiring > 200 MHz clock frequency and high fpga utilization
  • Domain knowledge in Digital Baseband Hardware / Signal Processing for LTE / 5G / WLAN is desirable