36 Analog Design Engineer, Principal Jobs in Santa Clara, CA
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31 MSI - (Marvell Semiconductor Inc.) US
Santa Clara, CA | Full Time
$135k-152k (estimate)
2 Months Ago
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Global Technical Talent, an Inc. 5000 Company
Santa Clara, CA | Full Time
$142k-172k (estimate)
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31 MSI - (Marvell Semiconductor Inc.) US
Santa Clara, CA | Full Time
$123k-146k (estimate)
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31 MSI - (Marvell Semiconductor Inc.) US
Santa Clara, CA | Full Time
$103k-123k (estimate)
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31 MSI - (Marvell Semiconductor Inc.) US
Santa Clara, CA | Full Time
$119k-143k (estimate)
2 Weeks Ago
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Analog Design Engineer, Principal
$147k-168k (estimate)
Full Time | Durable Manufacturing
1 Week Ago
Marvell Technology is Hiring an Analog Design Engineer, Principal Near Santa Clara, CA
About MarvellMarvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your ImpactCE-AMS - Join a world-class analog design team providing high performance analog and mixed mode circuits for industry-leading Networking and Automotive Ethernet products. Candidate will have opportunity to architect and design circuits for high performance transceivers and other critical analog functions.
What You Can Expect
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation And Benefit ElementsAt Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.
This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your ImpactCE-AMS - Join a world-class analog design team providing high performance analog and mixed mode circuits for industry-leading Networking and Automotive Ethernet products. Candidate will have opportunity to architect and design circuits for high performance transceivers and other critical analog functions.
What You Can Expect
- The candidate will be working on analog design of high-speed and high-performance SerDes in advanced technology nodes, 5nm, 3nm and beyond.
- Participate in SerDes Architecture Development with DSP, Analog and Digital design teams.
- Work with the AE for the IP characterization and validation plan
- Product and customer supporting.
- Provide instructions to the layout engineers.
- Should have strong analog design fundamentals and experience in designing analog circuit blocks such as PLL, Data Converters, Oscillators and high-speed SerDes blocks (CTLE, FFE, DFE, CDR, PLL, Line driver, etc.).
- Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post layout extraction tools) is a must
- Knowledge of the fundamentals on signal integrity improvement, noise reduction and Multi-GHz low-jitter clock generation & distribution.
- Good understanding of analog layouts in FinFet and its effect on high-speed designs
- Experienced in system level pre-tape out analog validation
- Experienced in lab chip bring-up and debugging efforts
- Strong communication and documentation skills
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation And Benefit ElementsAt Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.
This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Job Summary
JOB TYPE
Full Time
INDUSTRY
Durable Manufacturing
SALARY
$147k-168k (estimate)
POST DATE
09/03/2024
EXPIRATION DATE
10/26/2024
HEADQUARTERS
HAIDIAN, BEIJING
SIZE
200 - 500
FOUNDED
2004
CEO
MITCHELLLEEGAYNOR
REVENUE
$10M - $50M
INDUSTRY
Durable Manufacturing
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