Responsibilities You will be working on state-of-the art Fetch Unit architecture design serving both general purpose as well as AI processing element needs. Qualifications Ideal candidate will have 5 to 8 years of design experience (bright individuals with lower experience can also apply) with the following skills: Experience with branch prediction algorithms / instruction fetch design of high performance microprocessors Strong understanding of computer architecture Logic design experience with state of the art deep submicron technologies specifically low power design techniques Verilog / system Verilog / Synthesis / STA (Static timing analysis) / CDC / LINT Knowledge of programming languages C, scripting (Perl / shell / python / awk) is a plus #J-18808-Ljbffr