Hi ,

Hope you are doing good!!

Please find the below Job Description and let me know your interest.

Job Title: Senior RTL Design Engineer

Location: Complete On-Site at 1045 La Avenida St. Mountain View, CA 94043

Duration: Contract/Fulltime

NOTE: This role is similar to RTL design Engineer with strong experience in high speed PCIe designs and protocols, digital design principles in SoC and/or IP development, must have design background in Arteris NoC (Network on Chip) RTL generation or based on any other NoC tool

What You'll Be Doing:

• 7 years of related technical engineering experience

• 5 years of experience applying digital design principles in SoC and/or IP development.

• Proficient in Verilog/System Verilog coding constructs.

• Knowledge of front-end tools (Verilog simulators, Connectivity tools, CDC checkers, low power

static checkers, linting)

• Experience with high speed PCIe designs and protocols.

• Experience with Industry standard interface protocols such as AXI, APB, etc.

• Experience with ARM Fabric IPs.

• Experience with IPXACT.

• Understanding of Computer Architecture fundamentals.

• Ability to write scripts using Python, Tcl, Perl etc.

• Experience in EDA tools such as VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design

Compiler, Genus.

What We Are Looking For:

• BS or MS in Electrical Engineering (or equivalent)

• MUST HAVE design background in Arteris NoC (Network on Chip) RTL generation or based on any

other NoC tool.

• Proficiency with UPF (Low power intent)

• Proficiency in clock crossing techniques.

• Knowledge of Static Timing Analysis and understanding of timing signoff fundamentals. NoC tool

Education:

• Bachelor’s / Masters

Thanks & Regards

Arunkumar Ramanagola

Accounts Manager

Unidor Consulting LLC - Miami, FL 33126

Email – Arun.r@unidorconsulting.com

Phone - 1 (407) 550-4989