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Sr. DFT Engineer

Ambarella
Santa Clara, CA Full Time
POSTED ON 1/24/2025
AVAILABLE BEFORE 4/23/2025

Ambarella, a worldwide leader in edge AI semiconductors and software, is on a mission to bring artificial intelligence to all types of everyday devices, for enhanced environmental perception in everything from security cameras to robots to autonomous vehicles.Position Responsibilities : DFT implementation (Scan, Compression, MBIST, LBIST, and Streaming Scan Network) from RTL to Post-Production for complex multi-million gate Computer Vision SoC.Analyze clocking scheme and implement clock control structure for at-speed scan testing Develop / Generate high-quality scan and mbist patterns.DFT Verification (including post place-and-route timing simulations).Work with Product Engineering team to bring up scan & mbist patterns on ATE.Support silicon production activities including failure diagnosis and test optimization. Minimum Requirements : MS in Electrical / Computer Engineering or BS in Electrical / Computer Engineering with 1-5 years of experience in DFT implementationKnowledge of DFT fundamentalsKnowledge of Logic design and timingKnowledge of Verilog and PythonKnowledge of Mentor Tessent tools is a plusKnowledge of scan diagnostics is a plusThe base salary range is $135,000 - $196,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.Full timePosting Date : 2024-08-31

Salary : $135,000 - $196,000

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