Sr. Principal Fan Out Packaging Engineer

Position Summary: We are looking for a Senior Process Development and Integration Engineering lead for our Florida Advanced Packaging site. In this role you will lead, transfer, develop and improve processes for integrated Advanced Packaging process flows and Heterogenous Integration (HI) platform for Fan-Out Wafer Level Packaging (FOWLP). Excellent oral and written communication skills are required to effectively and efficiently communicate ideas with foundry customers, colleagues, and management.  Responsibilities:  New process development/transfer/integration for FOWLP technology in a manufacturing environment.  Lead or provide technical guidance to one or more teams for process integration or transfer advanced packaging solutions for platform Heterogenous Integration technologies and unique customer applications. Investigate and drive integration changes for improved device performance and yield improvement. Lead a team of process integration and tool engineers to find processing marginalities and make improvements. Directly interface with customers as a technical leader and expert in advanced FOWLP architectures. Act as technical lead and project manager integrating customer device requests with team activities. The job also requires performing other duties as assigned. Percentages of time spent on job duties are estimates and may vary for each position. Required Qualifications:  U.S. Person Required: SkyWater Technology Foundry, Inc. subject to the International Traffic in Arms Regulations (ITAR). All accepted applications must be U.S. Persons as defined by ITAR. ITAR defines a U.S. Person as U.S. citizen, U.S. Permanent Resident, Political Asylee, or Refugee. Education: BS Engineering, MS/PhD preferred. Physics, Electrical Engineering, Materials Science or equivalent. Experience with 2.5D/3D heterogeneous integration technologies such as FOWLP, SoIC, CoWoS, WoW, InFO, WLCSP and/or other chiplet/SiP architectures. Demonstrated leadership experience in guiding cross-functional teams and driving technical excellence. Awareness of packaging roadmaps and business models across heterogenous integration commercial landscape. Experience with wafer bumping, package assembly, substrate technology, testing and product development lifecycle. MEMS, Photonics or CMOS device and packaging knowledge (or similar) with relevant combination of years of experience (10 years) and/or advanced degree. Proficient in DOE and SPC. Knowledge of 6-sigma concepts and applications. Demonstrated project management skills and/or defined training and relevant experience. Clear problem-solving capability, data driven, inventive solution oriented and can articulate thought processes. Demonstrated experience with customer interfacing to solve problems and transfer processes. Can work both independently and lead cross-functional teams for problem solving and process transfer.