Design Verification Engineer

Overview

• The ideal candidate will thrive in a fast-moving setting, is hungry for knowledge and is motivated to grow and take on more responsibilities in the organization. The person will have the opportunity to learn a multitude of hardware and software tools, new hardware platforms and new software languages, and be exposed to the latest development in the industry.
• The candidate will perform tasks such as analyzing requirements, developing simulation environments, running a multitude of EDA tools, and developing scripts for automation. Will work closely with R&D,global Application Engineering teams and customers to specify and develop next generation features,capabilities and applications in Synopsys’ verification technologies.
• Candidate also must be able to perform analysis of customer environment and setup, identification of appropriate blocks and metrics,root-cause-analysis of tool performance and problem complexity, and optimizing modeling logic simulation testbenches and environment for optimal tool performance. Ensures that client’s needs have been met and that the product/solution is fully functioning according to specification.

Responsibilities

• Collaborating with customers to integrate leading-edge Interface IP (IIP) into their ASIC SoC/systems.
• Providing IIP integration guidance throughout the SoC flow to resolve technical challenges.
• Conducting integration reviews at key milestones to ensure successful project completion.
• Supporting silicon and system bring-up to address any issues that arise during the process.
• Staying up-to-date with the latest industry specifications and applications in hot market segments.
• Occasionally traveling to customer sites to provide hands-on support and integration assistance.
• The position is technically challenging and carries great responsibilities. In return, there is an excellent career growth path for those who excel in the fast movingand high rewarding environment. The candidate will be part of an agile global team that works very closely with top customers and ensures the high quality solutions in a constantly changing environment.
•  

Requirements

• BSEE/MSEE preferred
• 3 years of industry related direct experience working in MSIP/SerDes/PCIe technologies as part of IP/ASIC/SoC design or implementation(such as RTL coding, simulation/verification, Synthesis, floor planning, physical design, timing closure, etc.) or silicon bring-up/characterization in a system environment.
• Proficiency in MSIP/SerDes/PCIe technologies as part of IP/ASIC/SoC design or implementation.
• Experience with RTL coding, simulation/verification, synthesis, floor planning, physical design, and timing closure.
• Hands-on experience in silicon bring-up and characterization in a system environment.
• Technical knowledge of Interface IPs such as PCIe, USB, MIPI, HBM DDR, and LPDDR protocols.